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<a name="details" id="details"></a><h2 class="groupheader">Overview</h2>
<div class="textblock"><p>This is the main file for Xilinx HDMI RX core. </p>
<p>Please see <a class="el" href="xv__hdmirx1_8h.html" title="This is the main header file for Xilinx HDMI RX core. ">xv_hdmirx1.h</a> for more details of the driver.</p>
<pre>
MODIFICATION HISTORY:</pre><pre>Ver   Who    Date     Changes
</p>
<hr/>
<p>
1.00  EB     02/05/19 Initial release.
</pre><p>Please see <a class="el" href="xv__hdmirx1_8h.html" title="This is the main header file for Xilinx HDMI RX core. ">xv_hdmirx1.h</a> for more details of the driver.</p>
<pre>
MODIFICATION HISTORY:</pre><pre>Ver   Who    Date     Changes
</p>
<hr/>
<p>
1.00  EB     22/06/18 Initial release.
</pre> </div><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ae8f2b92316ba8599c678aa9168d2eb24"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#ae8f2b92316ba8599c678aa9168d2eb24">XV_HdmiRx1_CfgInitialize</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, <a class="el" href="struct_x_v___hdmi_rx1___config.html">XV_HdmiRx1_Config</a> *CfgPtr, UINTPTR EffectiveAddr)</td></tr>
<tr class="memdesc:ae8f2b92316ba8599c678aa9168d2eb24"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function initializes the HDMI RX core.  <a href="#ae8f2b92316ba8599c678aa9168d2eb24">More...</a><br/></td></tr>
<tr class="separator:ae8f2b92316ba8599c678aa9168d2eb24"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3a7ca7162f4a1fab75cbd46ad1006630"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a3a7ca7162f4a1fab75cbd46ad1006630">XV_HdmiRx1_SetAxiClkFreq</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, u32 ClkFreq)</td></tr>
<tr class="memdesc:a3a7ca7162f4a1fab75cbd46ad1006630"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the AXI4-Lite Clock Frequency.  <a href="#a3a7ca7162f4a1fab75cbd46ad1006630">More...</a><br/></td></tr>
<tr class="separator:a3a7ca7162f4a1fab75cbd46ad1006630"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af7fd5d8f18778311dec6be080788f6f2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#af7fd5d8f18778311dec6be080788f6f2">XV_HdmiRx1_Clear</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:af7fd5d8f18778311dec6be080788f6f2"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function clears the HDMI RX variables and sets them to the defaults.  <a href="#af7fd5d8f18778311dec6be080788f6f2">More...</a><br/></td></tr>
<tr class="separator:af7fd5d8f18778311dec6be080788f6f2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a331430d0474344d993eb016fca535e65"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a331430d0474344d993eb016fca535e65">XV_HdmiRx1_Start</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a331430d0474344d993eb016fca535e65"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function starts the HDMI RX core.  <a href="#a331430d0474344d993eb016fca535e65">More...</a><br/></td></tr>
<tr class="separator:a331430d0474344d993eb016fca535e65"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aacd8eb82c28cab7d1e72d51f7e4923b8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#aacd8eb82c28cab7d1e72d51f7e4923b8">XV_HdmiRx1_Stop</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:aacd8eb82c28cab7d1e72d51f7e4923b8"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function stops the HDMI RX core.  <a href="#aacd8eb82c28cab7d1e72d51f7e4923b8">More...</a><br/></td></tr>
<tr class="separator:aacd8eb82c28cab7d1e72d51f7e4923b8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:adca7f7b2b7849037460f1d95faa9ac7a"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#adca7f7b2b7849037460f1d95faa9ac7a">XV_HdmiRx1_SetStream</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, XVidC_PixelsPerClock Ppc, u32 Clock)</td></tr>
<tr class="memdesc:adca7f7b2b7849037460f1d95faa9ac7a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the HDMI RX stream parameters.  <a href="#adca7f7b2b7849037460f1d95faa9ac7a">More...</a><br/></td></tr>
<tr class="separator:adca7f7b2b7849037460f1d95faa9ac7a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a54c8f8e466187861aeeb7f1de53839c4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a54c8f8e466187861aeeb7f1de53839c4">XV_HdmiRx1_INT_VRST</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, u8 Reset)</td></tr>
<tr class="memdesc:a54c8f8e466187861aeeb7f1de53839c4"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function asserts or releases the HDMI RX Internal VRST.  <a href="#a54c8f8e466187861aeeb7f1de53839c4">More...</a><br/></td></tr>
<tr class="separator:a54c8f8e466187861aeeb7f1de53839c4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a50135eae0f23d244548816d4c08893f4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a50135eae0f23d244548816d4c08893f4">XV_HdmiRx1_INT_LRST</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, u8 Reset)</td></tr>
<tr class="memdesc:a50135eae0f23d244548816d4c08893f4"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function asserts or releases the HDMI RX Internal LRST.  <a href="#a50135eae0f23d244548816d4c08893f4">More...</a><br/></td></tr>
<tr class="separator:a50135eae0f23d244548816d4c08893f4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aba149130be3e337c3789bd0fcf3c8481"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#aba149130be3e337c3789bd0fcf3c8481">XV_HdmiRx1_EXT_VRST</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, u8 Reset)</td></tr>
<tr class="memdesc:aba149130be3e337c3789bd0fcf3c8481"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function asserts or releases the HDMI RX External VRST.  <a href="#aba149130be3e337c3789bd0fcf3c8481">More...</a><br/></td></tr>
<tr class="separator:aba149130be3e337c3789bd0fcf3c8481"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af441b03cc79286c209dbffed19fc6052"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#af441b03cc79286c209dbffed19fc6052">XV_HdmiRx1_EXT_SYSRST</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, u8 Reset)</td></tr>
<tr class="memdesc:af441b03cc79286c209dbffed19fc6052"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function asserts or releases the HDMI RX External SYSRST.  <a href="#af441b03cc79286c209dbffed19fc6052">More...</a><br/></td></tr>
<tr class="separator:af441b03cc79286c209dbffed19fc6052"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8a1adaddc73691394f2f181411fffdc7"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a8a1adaddc73691394f2f181411fffdc7">XV_HdmiRx1_SetPixelRate</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a8a1adaddc73691394f2f181411fffdc7"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the pixel rate.  <a href="#a8a1adaddc73691394f2f181411fffdc7">More...</a><br/></td></tr>
<tr class="separator:a8a1adaddc73691394f2f181411fffdc7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac9cfa9c40125304ad6b85cc1c88d3b52"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#ac9cfa9c40125304ad6b85cc1c88d3b52">XV_HdmiRx1_SetColorFormat</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ac9cfa9c40125304ad6b85cc1c88d3b52"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the color format.  <a href="#ac9cfa9c40125304ad6b85cc1c88d3b52">More...</a><br/></td></tr>
<tr class="separator:ac9cfa9c40125304ad6b85cc1c88d3b52"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac7552beea455de7ac51452cb284241f3"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#ac7552beea455de7ac51452cb284241f3">XV_HdmiRx1_SetHpd</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, u8 SetClr)</td></tr>
<tr class="memdesc:ac7552beea455de7ac51452cb284241f3"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function enables/clear Hot-Plug-Detect.  <a href="#ac7552beea455de7ac51452cb284241f3">More...</a><br/></td></tr>
<tr class="separator:ac7552beea455de7ac51452cb284241f3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a0cc1226093e566991849c308ebf9343a"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a0cc1226093e566991849c308ebf9343a">XV_HdmiRx1_GetLinkStatus</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, u8 Type)</td></tr>
<tr class="memdesc:a0cc1226093e566991849c308ebf9343a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function provides status of the HDMI RX core Link Status peripheral.  <a href="#a0cc1226093e566991849c308ebf9343a">More...</a><br/></td></tr>
<tr class="separator:a0cc1226093e566991849c308ebf9343a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1ba7daadc574d5f04ca24a9afc4da31b"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a1ba7daadc574d5f04ca24a9afc4da31b">XV_HdmiRx1_IsLinkStatusErrMax</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a1ba7daadc574d5f04ca24a9afc4da31b"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function provides status of one of the link error counters reached the maximum value.  <a href="#a1ba7daadc574d5f04ca24a9afc4da31b">More...</a><br/></td></tr>
<tr class="separator:a1ba7daadc574d5f04ca24a9afc4da31b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a303808819a246fb16be7b208ec3b4ebf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a303808819a246fb16be7b208ec3b4ebf">XV_HdmiRx1_ClearLinkStatus</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a303808819a246fb16be7b208ec3b4ebf"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function clears the link error counters.  <a href="#a303808819a246fb16be7b208ec3b4ebf">More...</a><br/></td></tr>
<tr class="separator:a303808819a246fb16be7b208ec3b4ebf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad6862d6b700903b0fde41c14f49c56ef"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#ad6862d6b700903b0fde41c14f49c56ef">XV_HdmiRx1_GetAcrCts</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ad6862d6b700903b0fde41c14f49c56ef"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function provides audio clock regenerating CTS (Cycle-Time Stamp) value at the HDMI sink device.  <a href="#ad6862d6b700903b0fde41c14f49c56ef">More...</a><br/></td></tr>
<tr class="separator:ad6862d6b700903b0fde41c14f49c56ef"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad372b661989dfb070a6931b88aadad86"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#ad372b661989dfb070a6931b88aadad86">XV_HdmiRx1_GetAcrN</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ad372b661989dfb070a6931b88aadad86"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function provides audio clock regenerating factor N value.  <a href="#ad372b661989dfb070a6931b88aadad86">More...</a><br/></td></tr>
<tr class="separator:ad372b661989dfb070a6931b88aadad86"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a071a1f439fe0d8c875eb7514984297a6"><td class="memItemLeft" align="right" valign="top">u16&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a071a1f439fe0d8c875eb7514984297a6">XV_HdmiRx1_DdcGetEdidWords</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a071a1f439fe0d8c875eb7514984297a6"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the size of the EDID buffer of the DDC slave.  <a href="#a071a1f439fe0d8c875eb7514984297a6">More...</a><br/></td></tr>
<tr class="separator:a071a1f439fe0d8c875eb7514984297a6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a68fc4c9bef5970c443f31b1b2148e6e7"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a68fc4c9bef5970c443f31b1b2148e6e7">XV_HdmiRx1_DdcLoadEdid</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, u8 *EdidData, u16 Length)</td></tr>
<tr class="memdesc:a68fc4c9bef5970c443f31b1b2148e6e7"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function loads the EDID data into the DDC slave.  <a href="#a68fc4c9bef5970c443f31b1b2148e6e7">More...</a><br/></td></tr>
<tr class="separator:a68fc4c9bef5970c443f31b1b2148e6e7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a28c6c659f8b15a0dcdcdb5a046049652"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a28c6c659f8b15a0dcdcdb5a046049652">XV_HdmiRx1_DdcHdcpSetAddress</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, u32 Address)</td></tr>
<tr class="memdesc:a28c6c659f8b15a0dcdcdb5a046049652"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the HDCP address in the DDC peripheral.  <a href="#a28c6c659f8b15a0dcdcdb5a046049652">More...</a><br/></td></tr>
<tr class="separator:a28c6c659f8b15a0dcdcdb5a046049652"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:acfd29595f76ba68f48eb651e8c97e1b8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#acfd29595f76ba68f48eb651e8c97e1b8">XV_HdmiRx1_DdcHdcpWriteData</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, u32 Data)</td></tr>
<tr class="memdesc:acfd29595f76ba68f48eb651e8c97e1b8"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function writes HDCP data in the DDC peripheral.  <a href="#acfd29595f76ba68f48eb651e8c97e1b8">More...</a><br/></td></tr>
<tr class="separator:acfd29595f76ba68f48eb651e8c97e1b8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a00e93fe81aff1008cf3302164029d8a2"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a00e93fe81aff1008cf3302164029d8a2">XV_HdmiRx1_DdcHdcpReadData</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a00e93fe81aff1008cf3302164029d8a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function reads HDCP data from the DDC peripheral.  <a href="#a00e93fe81aff1008cf3302164029d8a2">More...</a><br/></td></tr>
<tr class="separator:a00e93fe81aff1008cf3302164029d8a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a73ddb323bea902304e9078c943ffab9d"><td class="memItemLeft" align="right" valign="top">u16&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a73ddb323bea902304e9078c943ffab9d">XV_HdmiRx1_DdcGetHdcpWriteMessageBufferWords</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a73ddb323bea902304e9078c943ffab9d"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the number of bytes of the HDCP 2.2 write buffer in the DDC slave.  <a href="#a73ddb323bea902304e9078c943ffab9d">More...</a><br/></td></tr>
<tr class="separator:a73ddb323bea902304e9078c943ffab9d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a68b8778ca3dd3b9be8cfe9315837bed7"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a68b8778ca3dd3b9be8cfe9315837bed7">XV_HdmiRx1_DdcIsHdcpWriteMessageBufferEmpty</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a68b8778ca3dd3b9be8cfe9315837bed7"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns the status of the HDCP 2.2 write buffer in the DDC slave.  <a href="#a68b8778ca3dd3b9be8cfe9315837bed7">More...</a><br/></td></tr>
<tr class="separator:a68b8778ca3dd3b9be8cfe9315837bed7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a408d0c1659d09261cff536cf6226720c"><td class="memItemLeft" align="right" valign="top">u16&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a408d0c1659d09261cff536cf6226720c">XV_HdmiRx1_DdcGetHdcpReadMessageBufferWords</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a408d0c1659d09261cff536cf6226720c"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the number of bytes of the HDCP 2.2 read buffer in the DDC slave.  <a href="#a408d0c1659d09261cff536cf6226720c">More...</a><br/></td></tr>
<tr class="separator:a408d0c1659d09261cff536cf6226720c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a533b81d0c208429a0d535d72d183d988"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a533b81d0c208429a0d535d72d183d988">XV_HdmiRx1_DdcIsHdcpReadMessageBufferEmpty</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a533b81d0c208429a0d535d72d183d988"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns the status of the HDCP 2.2 read message buffer in the DDC slave.  <a href="#a533b81d0c208429a0d535d72d183d988">More...</a><br/></td></tr>
<tr class="separator:a533b81d0c208429a0d535d72d183d988"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae0a56a031d91c3f249937963dfce4c32"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#ae0a56a031d91c3f249937963dfce4c32">XV_HdmiRx1_Info</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ae0a56a031d91c3f249937963dfce4c32"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function prints stream and timing information on STDIO/UART console.  <a href="#ae0a56a031d91c3f249937963dfce4c32">More...</a><br/></td></tr>
<tr class="separator:ae0a56a031d91c3f249937963dfce4c32"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a13af54cb5eac5be1f950b9f9ee4773a7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a13af54cb5eac5be1f950b9f9ee4773a7">XV_HdmiRx1_DebugInfo</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a13af54cb5eac5be1f950b9f9ee4773a7"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function prints debug information on STDIO/UART console.  <a href="#a13af54cb5eac5be1f950b9f9ee4773a7">More...</a><br/></td></tr>
<tr class="separator:a13af54cb5eac5be1f950b9f9ee4773a7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ae9e628e19196bcade3dd720dc86db3a6"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#ae9e628e19196bcade3dd720dc86db3a6">XV_HdmiRx1_DdcRegDump</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ae9e628e19196bcade3dd720dc86db3a6"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function prints out RX's SCDC registers and values on STDIO/UART.  <a href="#ae9e628e19196bcade3dd720dc86db3a6">More...</a><br/></td></tr>
<tr class="separator:ae9e628e19196bcade3dd720dc86db3a6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8c36e5246bc11755fd3041843a4c0183"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a8c36e5246bc11755fd3041843a4c0183">XV_HdmiRx1_RegisterDebug</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a8c36e5246bc11755fd3041843a4c0183"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function prints out HDMI RX register.  <a href="#a8c36e5246bc11755fd3041843a4c0183">More...</a><br/></td></tr>
<tr class="separator:a8c36e5246bc11755fd3041843a4c0183"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8413882f499c0d1bef9d906564540634"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a8413882f499c0d1bef9d906564540634">XV_HdmiRx1_IsStreamUp</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a8413882f499c0d1bef9d906564540634"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function provides status of the stream.  <a href="#a8413882f499c0d1bef9d906564540634">More...</a><br/></td></tr>
<tr class="separator:a8413882f499c0d1bef9d906564540634"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4c588542caec0f1e6a2f7b7f14a85e47"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a4c588542caec0f1e6a2f7b7f14a85e47">XV_HdmiRx1_IsStreamScrambled</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a4c588542caec0f1e6a2f7b7f14a85e47"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function provides the stream scrambler status.  <a href="#a4c588542caec0f1e6a2f7b7f14a85e47">More...</a><br/></td></tr>
<tr class="separator:a4c588542caec0f1e6a2f7b7f14a85e47"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a05ec85e91c33d66e6460e24aa17d5310"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a05ec85e91c33d66e6460e24aa17d5310">XV_HdmiRx1_IsStreamConnected</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a05ec85e91c33d66e6460e24aa17d5310"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function provides the stream connected status.  <a href="#a05ec85e91c33d66e6460e24aa17d5310">More...</a><br/></td></tr>
<tr class="separator:a05ec85e91c33d66e6460e24aa17d5310"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a6c66ee7dbad42980fb2297404ee4fa7a"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a6c66ee7dbad42980fb2297404ee4fa7a">XV_HdmiRx1_GetTmdsClockRatio</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a6c66ee7dbad42980fb2297404ee4fa7a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the SCDC TMDS clock ratio bit.  <a href="#a6c66ee7dbad42980fb2297404ee4fa7a">More...</a><br/></td></tr>
<tr class="separator:a6c66ee7dbad42980fb2297404ee4fa7a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab77058d12d39a6cae1920402ad231de8"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#ab77058d12d39a6cae1920402ad231de8">XV_HdmiRx1_GetAviVic</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ab77058d12d39a6cae1920402ad231de8"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns the AVI VIC (captured by the AUX peripheral)  <a href="#ab77058d12d39a6cae1920402ad231de8">More...</a><br/></td></tr>
<tr class="separator:ab77058d12d39a6cae1920402ad231de8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad4f280e6064c750dcc09cdd3bdcaa408"><td class="memItemLeft" align="right" valign="top">XVidC_ColorFormat&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#ad4f280e6064c750dcc09cdd3bdcaa408">XV_HdmiRx1_GetAviColorSpace</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:ad4f280e6064c750dcc09cdd3bdcaa408"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns the AVI colorspace (captured by the AUX peripheral)  <a href="#ad4f280e6064c750dcc09cdd3bdcaa408">More...</a><br/></td></tr>
<tr class="separator:ad4f280e6064c750dcc09cdd3bdcaa408"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4c6e4ca31c0b284eaa58924dd42d1d13"><td class="memItemLeft" align="right" valign="top">XVidC_ColorDepth&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a4c6e4ca31c0b284eaa58924dd42d1d13">XV_HdmiRx1_GetGcpColorDepth</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a4c6e4ca31c0b284eaa58924dd42d1d13"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns the GCP color depth (captured by the AUX peripheral)  <a href="#a4c6e4ca31c0b284eaa58924dd42d1d13">More...</a><br/></td></tr>
<tr class="separator:a4c6e4ca31c0b284eaa58924dd42d1d13"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a324586d14f5578cd7e037650380c0dc4"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a324586d14f5578cd7e037650380c0dc4">XV_HdmiRx1_Divide</a> (u32 Dividend, u32 Divisor)</td></tr>
<tr class="memdesc:a324586d14f5578cd7e037650380c0dc4"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function calculates the divider for the frame calculation.  <a href="#a324586d14f5578cd7e037650380c0dc4">More...</a><br/></td></tr>
<tr class="separator:a324586d14f5578cd7e037650380c0dc4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab09051531748d89ef3d9af63d542c07d"><td class="memItemLeft" align="right" valign="top">XVidC_VideoMode&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#ab09051531748d89ef3d9af63d542c07d">XV_HdmiRx1_LookupVmId</a> (u8 Vic)</td></tr>
<tr class="memdesc:ab09051531748d89ef3d9af63d542c07d"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function searches for the video mode based on the vic.  <a href="#ab09051531748d89ef3d9af63d542c07d">More...</a><br/></td></tr>
<tr class="separator:ab09051531748d89ef3d9af63d542c07d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a77f3a5723008c8604137960daa6174bd"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a77f3a5723008c8604137960daa6174bd">XV_HdmiRx1_GetVideoProperties</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a77f3a5723008c8604137960daa6174bd"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function reads the video properties from the aux peripheral.  <a href="#a77f3a5723008c8604137960daa6174bd">More...</a><br/></td></tr>
<tr class="separator:a77f3a5723008c8604137960daa6174bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aeb4be084a07a96cd89d3f4386fbadae2"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#aeb4be084a07a96cd89d3f4386fbadae2">XV_HdmiRx1_GetVideoTiming</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:aeb4be084a07a96cd89d3f4386fbadae2"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function reads the video timing from the VTD peripheral.  <a href="#aeb4be084a07a96cd89d3f4386fbadae2">More...</a><br/></td></tr>
<tr class="separator:aeb4be084a07a96cd89d3f4386fbadae2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:abd15bdeaefdc3438e5b1ddeb17670efa"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#abd15bdeaefdc3438e5b1ddeb17670efa">XV_HdmiRx1_SetPixelClk</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:abd15bdeaefdc3438e5b1ddeb17670efa"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the PixelClk based on the current ColorDepth, RefClk and ColorFormatId.  <a href="#abd15bdeaefdc3438e5b1ddeb17670efa">More...</a><br/></td></tr>
<tr class="separator:abd15bdeaefdc3438e5b1ddeb17670efa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8fde9d6293c66dde0cb3d18dfbf2375a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a8fde9d6293c66dde0cb3d18dfbf2375a">XV_HdmiRx1_UpdateEdFlags</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a8fde9d6293c66dde0cb3d18dfbf2375a"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function checks if RX's CED or RSED counters are incrementing at the rate of 4 or higher per second or if they first hit the maximum value (0x7FFF) then set the CED_Update or RSED_Update SCDC flags if true.  <a href="#a8fde9d6293c66dde0cb3d18dfbf2375a">More...</a><br/></td></tr>
<tr class="separator:a8fde9d6293c66dde0cb3d18dfbf2375a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af10ef171597554725eb963e6ee83278b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#af10ef171597554725eb963e6ee83278b">XV_HdmiRx1_TmrStartMs</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, u32 Milliseconds, u8 TimerSelect)</td></tr>
<tr class="memdesc:af10ef171597554725eb963e6ee83278b"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the timer of RX Core.  <a href="#af10ef171597554725eb963e6ee83278b">More...</a><br/></td></tr>
<tr class="separator:af10ef171597554725eb963e6ee83278b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a34282e19418aecffbb5c59ee9a217339"><td class="memItemLeft" align="right" valign="top">XV_HdmiC_VrrInfoframeType&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#a34282e19418aecffbb5c59ee9a217339">XV_HdmiRx1_GetVrrIfType</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr)</td></tr>
<tr class="memdesc:a34282e19418aecffbb5c59ee9a217339"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function returns VRR infoframe type.  <a href="#a34282e19418aecffbb5c59ee9a217339">More...</a><br/></td></tr>
<tr class="separator:a34282e19418aecffbb5c59ee9a217339"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aad257ad1f1f6c43a90f3bb06a485da36"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#aad257ad1f1f6c43a90f3bb06a485da36">XV_HdmiRx1_SetVrrIfType</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, XV_HdmiC_VrrInfoframeType Type)</td></tr>
<tr class="memdesc:aad257ad1f1f6c43a90f3bb06a485da36"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function Sets VRR infoframe type.  <a href="#aad257ad1f1f6c43a90f3bb06a485da36">More...</a><br/></td></tr>
<tr class="separator:aad257ad1f1f6c43a90f3bb06a485da36"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aadab16501ebe113f3881aa7c7d2091f1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#aadab16501ebe113f3881aa7c7d2091f1">XV_HdmiRx1_DynHDR_SetAddr</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, u64 Addr)</td></tr>
<tr class="memdesc:aadab16501ebe113f3881aa7c7d2091f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function sets the Dynamic HDR buffer address.  <a href="#aadab16501ebe113f3881aa7c7d2091f1">More...</a><br/></td></tr>
<tr class="separator:aadab16501ebe113f3881aa7c7d2091f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa24cf0e5a4acc2782061566c06f354cc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="xv__hdmirx1_8c.html#aa24cf0e5a4acc2782061566c06f354cc">XV_HdmiRx1_DynHDR_GetInfo</a> (<a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *InstancePtr, <a class="el" href="struct_x_v___hdmi_rx1___dyn_h_d_r___info.html">XV_HdmiRx1_DynHDR_Info</a> *RxDynHdrInfoPtr)</td></tr>
<tr class="memdesc:aa24cf0e5a4acc2782061566c06f354cc"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function gets the Dynamic HDR packet type, length, whether graphics overlay and errors if any.  <a href="#aa24cf0e5a4acc2782061566c06f354cc">More...</a><br/></td></tr>
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<h2 class="groupheader">Function Documentation</h2>
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          <td class="memname">int XV_HdmiRx1_CfgInitialize </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1___config.html">XV_HdmiRx1_Config</a> *&#160;</td>
          <td class="paramname"><em>CfgPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">UINTPTR&#160;</td>
          <td class="paramname"><em>EffectiveAddr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>This function initializes the HDMI RX core. </p>
<p>This function must be called prior to using the HDMI RX core. Initialization of the HDMI RX includes setting up the instance data, and ensuring the hardware is in a quiescent state.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the XHdmiRx1 core instance. </td></tr>
    <tr><td class="paramname">CfgPtr</td><td>points to the configuration structure associated with the HDMI RX core. </td></tr>
    <tr><td class="paramname">EffectiveAddr</td><td>is the base address of the device. If address translation is being used, then this parameter must reflect the virtual base address. Otherwise, the physical address should be used.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if XV_HdmiRx1_CfgInitialize was successful.</li>
<li>XST_FAILURE if HDMI RX PIO ID mismatched.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1.html#ac6cde43853e1f68b75e12786b8b27184">XV_HdmiRx1::AudCallback</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#a03b60e69b1ded28e64fc01497d9ea02c">XV_HdmiRx1::AuxCallback</a>, <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#ab71556ccd55ddd82fd84890c4e09df18">XV_HdmiRx1::ConnectCallback</a>, <a class="el" href="struct_x_v___hdmi_rx1___frl.html#af43d413c9a668400e3c0b8fbac302e19">XV_HdmiRx1_Frl::CurFrlRate</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#af1a889495687e670d6a591170761a810">XV_HdmiRx1::DdcCallback</a>, <a class="el" href="struct_x_v___hdmi_rx1___frl.html#a0f554039b7fe90c629cb245a727540b7">XV_HdmiRx1_Frl::DefaultLtp</a>, <a class="el" href="struct_x_v___hdmi_rx1___config.html#ac0ebea46345e62a86c591fa7b7630e18">XV_HdmiRx1_Config::DSC</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#ad3c15f528662fba6efbc2bf5a1d034a0">XV_HdmiRx1::FrlConfigCallback</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#a287b6bb5e1ca228324f5126907f03a6c">XV_HdmiRx1::FrlStartCallback</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#a332b700f16b8e3826767971c3bf859b2">XV_HdmiRx1::HdcpCallback</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#ae0248f4981813e9e7d4556a02608a371">XV_HdmiRx1::HdcpRef</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#a702c45e45b496ad8b6aa51238a8b5bb2">XV_HdmiRx1::IsReady</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#a6389ceb5ffcc260ea4e14df3b8488d45">XV_HdmiRx1::LinkErrorCallback</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#a65bf83a0a4a7289ed9b2b4ce701ac8dd">XV_HdmiRx1::LnkStaCallback</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aee0b055b6e7208d61012abdae2df5018">XV_HdmiRx1::ModeCallback</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#adf8543d358aeaf359d915412003845e3">XV_HdmiRx1::Stream</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#a4e92779a4947b7ff5ec5ea6fe0c0417c">XV_HdmiRx1::StreamDownCallback</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#ae72087cc837d809b1beaa9d8b798c9db">XV_HdmiRx1::StreamInitCallback</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#a54c1ff6cbf1c7d1c8a7e0323e60d64b6">XV_HdmiRx1::StreamUpCallback</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#a81e87ae653cb737329383942f3d51df5">XV_HdmiRx1::SyncLossCallback</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#a2838b98abee66bedb928f74f015fd40e">XV_HdmiRx1::TmdsClkRatioCallback</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#ae6f5c0eabdc405e9ee6cbfd455873587">XV_HdmiRx1::TmdsConfigCallback</a>, <a class="el" href="xv__hdmirx1_8h.html#a4ddfdbb13a735158eac6316b10fe827b">XV_HdmiRx1_AudioDisable</a>, <a class="el" href="xv__hdmirx1_8h.html#a48cc569dd4043d7d85a22e18f3e7ff14">XV_HdmiRx1_AudioIntrEnable</a>, <a class="el" href="xv__hdmirx1_8h.html#ab7b551cd29147914edb614a75ad72106">XV_HdmiRx1_AuxDisable</a>, <a class="el" href="xv__hdmirx1_8h.html#a167821ef9d8c222d4d8c1bc194e1d42b">XV_HdmiRx1_AuxFSyncVrrChEvtEnable</a>, <a class="el" href="xv__hdmirx1_8h.html#af5e8e60bd7c915758d1a6961901427cc">XV_HdmiRx1_AuxIntrEnable</a>, <a class="el" href="xv__hdmirx1_8c.html#af7fd5d8f18778311dec6be080788f6f2">XV_HdmiRx1_Clear()</a>, <a class="el" href="xv__hdmirx1_8h.html#afa5c7f669b19e1b0f9cbad39adb674bc">XV_HdmiRx1_DdcDisable</a>, <a class="el" href="xv__hdmirx1_8h.html#a2fa160f04e804a5214822c2031bcce4a">XV_HdmiRx1_DdcEnable</a>, <a class="el" href="xv__hdmirx1_8h.html#ad2801bbba5e4a3492373d59f783bc0b4">XV_HdmiRx1_DdcScdcClear</a>, <a class="el" href="xv__hdmirx1_8h.html#a29847cccb96616c7a70252a0ae823e67">XV_HdmiRx1_DdcScdcEnable</a>, <a class="el" href="xv__hdmirx1_8h.html#ab17e4f96ebbe6785b411233165de859a">XV_HdmiRx1_FrlDdcWriteField()</a>, <a class="el" href="xv__hdmirx1_8h.html#a04b941fdfc281d7d81665d47ac32f1d2">XV_HdmiRx1_FrlReset()</a>, <a class="el" href="xv__hdmirx1_8h.html#ab5713966b53828111f26a3a75e0e8d1a">XV_HdmiRx1_GetTime16Ms</a>, <a class="el" href="xv__hdmirx1_8h.html#ad50e1b7607576055e893d5b671ab20e8">XV_HdmiRx1_LnkstaDisable</a>, <a class="el" href="xv__hdmirx1_8h.html#a82a49f48613a311ebd77b7c06d774287">XV_HdmiRx1_LnkstaEnable</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a090582e52a472f924918d70505f62b11">XV_HDMIRX1_MASK_16</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aa303f116af14392fe13aebd0cc78a125">XV_HDMIRX1_PIO_ID</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#af194c444b1a273aed3950eca10ca1135">XV_HDMIRX1_PIO_ID_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a04e11b499092095ce68d48fc3f40e04c">XV_HDMIRX1_PIO_IN_BRDG_OVERFLOW_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a106ccba962224187a330b068ddd772c1">XV_HDMIRX1_PIO_IN_DET_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a5223536dada6b7c9610aea11ae7a190b">XV_HDMIRX1_PIO_IN_DSC_EN_STRM_CHG_EVT_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ad9a3ed590d3044b9978cdcd1a20abe06">XV_HDMIRX1_PIO_IN_DSC_PPS_PKT_ERR_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a84f86b84d6ad904b4c48821aacd45533">XV_HDMIRX1_PIO_IN_EVT_FE_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a0560f28ec4c56a00c8922c127fabcbee">XV_HDMIRX1_PIO_IN_EVT_RE_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a4ac3277902c44edfcce1cc6c8afcf2e3">XV_HDMIRX1_PIO_IN_LNK_RDY_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a9e9029db2aff750b7c208c8eca7faff9">XV_HDMIRX1_PIO_IN_MODE_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ac0cdb812388d2c6c671cc5e884eed62f">XV_HDMIRX1_PIO_IN_SCDC_SCRAMBLER_ENABLE_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a51d2852cd78f9a896e224454b97f092b">XV_HDMIRX1_PIO_IN_SCDC_TMDS_CLOCK_RATIO_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a7e39e0c95a43c2962ee66c1a45f3fbed">XV_HDMIRX1_PIO_IN_VID_RDY_MASK</a>, <a class="el" href="xv__hdmirx1_8h.html#a4d57a91b21377a43a2692f64564bc121">XV_HdmiRx1_PioDisable</a>, <a class="el" href="xv__hdmirx1_8h.html#ae5f391082b5e60a7ea25086124900070">XV_HdmiRx1_PioIntrDisable</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>, <a class="el" href="xv__hdmirx1_8h.html#a4806363b327ac1b624d0b470ab46c142">XV_HdmiRx1_SetFrlRateWrEvent_En()</a>, <a class="el" href="xv__hdmirx1_8c.html#ac7552beea455de7ac51452cb284241f3">XV_HdmiRx1_SetHpd()</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a44f9bde6a5097e3b1c287447e8292f87">XV_HDMIRX1_SHIFT_16</a>, <a class="el" href="xv__hdmirx1_8h.html#aec115cc3973ecedde65e4b11d3ad5b5b">XV_HdmiRx1_Tmr1Disable</a>, <a class="el" href="xv__hdmirx1_8h.html#a056971e8df07e73576859f1d25eb5b96">XV_HdmiRx1_Tmr1Enable</a>, <a class="el" href="xv__hdmirx1_8h.html#a267240b43d2cadda19be932109867557">XV_HdmiRx1_Tmr1IntrDisable</a>, <a class="el" href="xv__hdmirx1_8h.html#a27d61d0271f92f32b92971dcd726c2ca">XV_HdmiRx1_Tmr1IntrEnable</a>, <a class="el" href="xv__hdmirx1_8h.html#a1faa4df9824550b8f828d68597ddd2c1">XV_HdmiRx1_Tmr2Disable</a>, <a class="el" href="xv__hdmirx1_8h.html#a015741105c8cf02b20e69e03b65ccc71">XV_HdmiRx1_Tmr2Enable</a>, <a class="el" href="xv__hdmirx1_8h.html#af026514eac245f4f7fea082361577997">XV_HdmiRx1_Tmr2IntrDisable</a>, <a class="el" href="xv__hdmirx1_8h.html#ac88f46543d066f90f95e6ca05e9561de">XV_HdmiRx1_Tmr2IntrEnable</a>, <a class="el" href="xv__hdmirx1_8h.html#aadacbe89d70bbefbf1e71042d777ea92">XV_HdmiRx1_Tmr3Disable</a>, <a class="el" href="xv__hdmirx1_8h.html#a7a1da40034b17fcdd3a0b4e62d17cf78">XV_HdmiRx1_Tmr3Enable</a>, <a class="el" href="xv__hdmirx1_8h.html#a963af2bc8daca1f5f771b75e7ed0f83d">XV_HdmiRx1_Tmr3IntrDisable</a>, <a class="el" href="xv__hdmirx1_8h.html#a826103168347fef524be56f819b48b2d">XV_HdmiRx1_Tmr3IntrEnable</a>, <a class="el" href="xv__hdmirx1_8h.html#a1bbae2cd92459ab09caba931c2eeb766">XV_HdmiRx1_Tmr4Disable</a>, <a class="el" href="xv__hdmirx1_8h.html#a142ca05b75d070d95c61004b82bb5a68">XV_HdmiRx1_Tmr4IntrDisable</a>, <a class="el" href="xv__hdmirx1_8h.html#ab5508950e173aa4b8c4736e0ae09266c">XV_HdmiRx1_VtdDisable</a>, <a class="el" href="xv__hdmirx1_8h.html#a59b4dbbffb9eeec8b22acc012d22e07f">XV_HdmiRx1_VtdIntrDisable</a>, <a class="el" href="xv__hdmirx1_8h.html#a56b0470904fc7dad8850ce0b88738404">XV_HdmiRx1_VtdSetTimebase</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a949523423dffb540041a98a38e283cf8">XV_HdmiRx1_WriteReg</a>.</p>

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          <td class="memname">void XV_HdmiRx1_Clear </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
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<p>This function clears the HDMI RX variables and sets them to the defaults. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This is required after a reset or init. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___audio_stream.html#a29818d1e0242ab44184ca5025858f41d">XV_HdmiRx1_AudioStream::Active</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#a1f1d3dba8440eab1b16fa2e9bbdc63fa">XV_HdmiRx1::AudCts</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#ad42e02b06b2c76ab3088ae992056cad6">XV_HdmiRx1::AudFormat</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#a05571834a2194dd996c7c1638f6825c5">XV_HdmiRx1::AudN</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#a48707022720d8ba22157d38026101285">XV_HdmiRx1::Aux</a>, <a class="el" href="struct_x_v___hdmi_rx1___audio_stream.html#a5913b7bda0855132f5bdbcb506fb543a">XV_HdmiRx1_AudioStream::Channels</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#a59c722dfcd49130ef9a2fdddfbb84ce8">XV_HdmiRx1::IsErrorPrintCount</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#adf8543d358aeaf359d915412003845e3">XV_HdmiRx1::Stream</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#a4e92779a4947b7ff5ec5ea6fe0c0417c">XV_HdmiRx1::StreamDownCallback</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aca26516c2edc8f4444b8fd8e76cf708d">XV_HdmiRx1::StreamDownRef</a>, <a class="el" href="struct_x_v___hdmi_rx1___frl.html#a0eb1fb5490f5c6416d49455599444083">XV_HdmiRx1_Frl::TrainingState</a>, <a class="el" href="xv__hdmirx1_8h.html#aaff80d21f94c4b494ab6beb909f74ebaa9b3b6fc66356c86b1e37dc20b4a69933">XV_HDMIRX1_STATE_STREAM_DOWN</a>, and <a class="el" href="xv__hdmirx1_8h.html#aadacbe89d70bbefbf1e71042d777ea92">XV_HdmiRx1_Tmr3Disable</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmirx1_8h.html#ae8f2b92316ba8599c678aa9168d2eb24">XV_HdmiRx1_CfgInitialize()</a>.</p>

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          <td class="memname">void XV_HdmiRx1_ClearLinkStatus </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
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<p>This function clears the link error counters. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a0ea4dac580c41d65c59984742c93fcaf">XV_HDMIRX1_LNKSTA_CTRL_CLR_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#adf40e22e8f2c99293f379a117807d84d">XV_HDMIRX1_LNKSTA_CTRL_ERR_CLR_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a23eec7113adc6c29ad2a46331582ae29">XV_HDMIRX1_LNKSTA_CTRL_SET_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a949523423dffb540041a98a38e283cf8">XV_HdmiRx1_WriteReg</a>.</p>

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          <td class="memname">u16 XV_HdmiRx1_DdcGetEdidWords </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
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<p>This function gets the size of the EDID buffer of the DDC slave. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>EDID buffer size</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#abb393b7a8cc8cb837e91eb6b2f186ab0">XV_HDMIRX1_DDC_EDID_STA_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a1696b82de3b20c5513c3ff4ee5015ba9">XV_HDMIRX1_DDC_STA_EDID_WORDS_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a885b5e8b024ee09446052c46f7e09bf8">XV_HDMIRX1_DDC_STA_EDID_WORDS_SHIFT</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmirx1_8h.html#a7de516253c3c6e3deb0e6141be953e35">XV_HdmiRx1_DdcLoadEdid()</a>.</p>

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          <td class="memname">u16 XV_HdmiRx1_DdcGetHdcpReadMessageBufferWords </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function gets the number of bytes of the HDCP 2.2 read buffer in the DDC slave. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the XHdmi_Rx core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>HDCP 2.2 read buffer words</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aa2e6b62c7b7e30d408bd3743409310f9">XV_HDMIRX1_DDC_HDCP_STA_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aee72508c9844747a42defa2b3f2ce8dc">XV_HDMIRX1_DDC_STA_HDCP_RMSG_WORDS_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a10fc375c829dc41f2417ba5f3ebc2fe5">XV_HDMIRX1_DDC_STA_HDCP_RMSG_WORDS_SHIFT</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>.</p>

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          <td class="memname">u16 XV_HdmiRx1_DdcGetHdcpWriteMessageBufferWords </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function gets the number of bytes of the HDCP 2.2 write buffer in the DDC slave. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the XHdmi_Rx core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>HDCP 2.2 write buffer words</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aa2e6b62c7b7e30d408bd3743409310f9">XV_HDMIRX1_DDC_HDCP_STA_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a5adb107c4de97c736e7e7ab634212474">XV_HDMIRX1_DDC_STA_HDCP_WMSG_WORDS_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ab61a6b938d6e9f9579506c97512c7729">XV_HDMIRX1_DDC_STA_HDCP_WMSG_WORDS_SHIFT</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>.</p>

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          <td class="memname">u32 XV_HdmiRx1_DdcHdcpReadData </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function reads HDCP data from the DDC peripheral. </p>
<p>This is implemented as a function and not a macro, so the HDCP driver can bind the function call with a handler.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the XHdmi_Rx core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Returns the HDCP data read from the DDC peripheral.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature: u32 XHdmiRx1_DdcHdcpReadData(XHdmi_Rx *InstancePtr) </dd></dl>

<p>References <a class="el" href="xv__hdmirx1__hw_8h.html#ada994691776136b75789d9e343b4ce08">XV_HDMIRX1_DDC_HDCP_DATA_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>.</p>

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          <td class="memname">void XV_HdmiRx1_DdcHdcpSetAddress </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Address</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function sets the HDCP address in the DDC peripheral. </p>
<p>This is implemented as a function and not a macro, so the HDCP driver can bind the function call with a handler.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the XHdmi_Rx core instance. </td></tr>
    <tr><td class="paramname">Address</td><td>is the HDCP address.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature: void XHdmiRx1_DdcHdcpSetAddress(XHdmi_Rx *InstancePtr, u8 Address) </dd></dl>

<p>References <a class="el" href="xv__hdmirx1__hw_8h.html#a8bbedc62df34078ef06647b7130e16f4">XV_HDMIRX1_DDC_HDCP_ADDRESS_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a949523423dffb540041a98a38e283cf8">XV_HdmiRx1_WriteReg</a>.</p>

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          <td class="memname">void XV_HdmiRx1_DdcHdcpWriteData </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Data</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function writes HDCP data in the DDC peripheral. </p>
<p>This is implemented as a function and not a macro, so the HDCP driver can bind the function call with a handler.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the XHdmi_Rx core instance. </td></tr>
    <tr><td class="paramname">Data</td><td>is the HDCP data to be written.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature: void XHdmiRx1_DdcHdcpWriteData(XHdmi_Rx *InstancePtr, u8 Data) </dd></dl>

<p>References <a class="el" href="xv__hdmirx1__hw_8h.html#ada994691776136b75789d9e343b4ce08">XV_HDMIRX1_DDC_HDCP_DATA_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a949523423dffb540041a98a38e283cf8">XV_HdmiRx1_WriteReg</a>.</p>

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          <td class="memname">int XV_HdmiRx1_DdcIsHdcpReadMessageBufferEmpty </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function returns the status of the HDCP 2.2 read message buffer in the DDC slave. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the XHdmi_Rx core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>TRUE = HDCP 2.2 message buffer is empty.</li>
<li>FALSE = HDCP 2.2 message buffer contains data.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aa2e6b62c7b7e30d408bd3743409310f9">XV_HDMIRX1_DDC_HDCP_STA_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ac65d331a8b1681442417b8a227c3e985">XV_HDMIRX1_DDC_STA_HDCP_RMSG_EP_MASK</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>.</p>

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          <td class="memname">int XV_HdmiRx1_DdcIsHdcpWriteMessageBufferEmpty </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
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      </table>
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<p>This function returns the status of the HDCP 2.2 write buffer in the DDC slave. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the XHdmi_Rx core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>TRUE = HDCP 2.2 message buffer is empty.</li>
<li>FALSE = HDCP 2.2 message buffer contains data.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aa2e6b62c7b7e30d408bd3743409310f9">XV_HDMIRX1_DDC_HDCP_STA_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aa097132dd0838bf692d390fc1e28cbc9">XV_HDMIRX1_DDC_STA_HDCP_WMSG_EP_MASK</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>.</p>

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          <td class="memname">int XV_HdmiRx1_DdcLoadEdid </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8 *&#160;</td>
          <td class="paramname"><em>EdidData</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Length</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function loads the EDID data into the DDC slave. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance. </td></tr>
    <tr><td class="paramname">EdidData</td><td>is a pointer to the EDID data array. </td></tr>
    <tr><td class="paramname">Length</td><td>is the length, in bytes, of the EDID array.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if the EDID data was loaded successfully</li>
<li>XST_FAILURE if the EDID data load failed</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ad4057a137cbf824dbce306e040b82c49">XV_HDMIRX1_DDC_CTRL_EDID_EN_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a771754708a8fe2d29a65563db1a7a118">XV_HDMIRX1_DDC_CTRL_SET_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#abcfd19bf175b5a1df19606aecdb38d54">XV_HDMIRX1_DDC_EDID_DATA_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a41c54aba350be9952f7b1b154234c1d6">XV_HDMIRX1_DDC_EDID_WP_OFFSET</a>, <a class="el" href="xv__hdmirx1_8c.html#a071a1f439fe0d8c875eb7514984297a6">XV_HdmiRx1_DdcGetEdidWords()</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a949523423dffb540041a98a38e283cf8">XV_HdmiRx1_WriteReg</a>.</p>

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          <td class="memname">void XV_HdmiRx1_DdcRegDump </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function prints out RX's SCDC registers and values on STDIO/UART. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ac5b57521457e46c5e347db1bd1d8ac28">XV_HDMIRX1_FRL_SCDC_ADDR_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a070a1c8c80d4f949700398f70e4c1184">XV_HDMIRX1_FRL_SCDC_DAT_SHIFT</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aa5500d41f17295752a46f34a3f6ca2f3">XV_HDMIRX1_FRL_SCDC_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a96095a3a06333a80279343e58bd9a512">XV_HDMIRX1_FRL_SCDC_RD_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aa89cb22259109c7e37ef35afa705782a">XV_HDMIRX1_FRL_SCDC_RDY_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a949523423dffb540041a98a38e283cf8">XV_HdmiRx1_WriteReg</a>.</p>

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          <td class="memname">void XV_HdmiRx1_DebugInfo </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
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<p>This function prints debug information on STDIO/UART console. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a9db246d6864fa36907e4328865361617">XV_HDMIRX1_DBG_STA_LANE_LOCK_CHGALL_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a01fb2daa2e91e2578d672460d8e76a31">XV_HDMIRX1_DBG_STA_LANE_LOCK_CHGALL_SHIFT</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aa7d3866d8c4fe0eb40668892c8907a6e">XV_HDMIRX1_DBG_STA_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ae71ca916fc1e751c0f5721bade5ab3b6">XV_HDMIRX1_DBG_STA_SCRM_LOCK_CHGALL_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a3d000d222218f9abca8a2dabd6626936">XV_HDMIRX1_DBG_STA_SCRM_LOCK_CHGALL_SHIFT</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aceb903127dc18e063143a5e9a63b1757">XV_HDMIRX1_DBG_STA_SKEW_LOCK_CHG_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#af2f364dc06424596ccc3ad6ab2b5e547">XV_HDMIRX1_DBG_STA_WA_LOCK_CHGALL_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ac99474f377d76e370d9dde2c72fac684">XV_HDMIRX1_DBG_STA_WA_LOCK_CHGALL_SHIFT</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a9ee121571671ab263e18f314daa4e822">XV_HDMIRX1_DBG_STA_WA_TAP_CHGALL_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a566bd6a5e931c701ab04941f556b7817">XV_HDMIRX1_FRL_ERR_CNT1_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a1a5393b88617a33dff7527a0c7a3f84c">XV_HDMIRX1_FRL_RATIO_ACT_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a9607aefecf7958adf00b11faaca7ceb0">XV_HDMIRX1_FRL_RATIO_TOT_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a95df122fd8f593ac94504abaff87fecb">XV_HDMIRX1_FRL_RSFC_CNT_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a819ca83e4c0169868874dc344b97e0f9">XV_HDMIRX1_FRL_STA_FRL_LANES_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a2c5d7ff6904298bf55ccaa3ad1e52209">XV_HDMIRX1_FRL_STA_FRL_MODE_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a9ce5dbbe22e0e4254cec1e5c1e791b9e">XV_HDMIRX1_FRL_STA_FRL_RATE_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a9ae67cbce6039396d76e9fae77871960">XV_HDMIRX1_FRL_STA_FRL_RATE_SHIFT</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a14fa43a8eb929f9834823a037557c755">XV_HDMIRX1_FRL_STA_LANE_LOCK_ALLL_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#af3ce4c26d43187cdd23935f92d00772b">XV_HDMIRX1_FRL_STA_LANE_LOCK_ALLL_SHIFT</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a96860e2915010d82971cc380b30d30fd">XV_HDMIRX1_FRL_STA_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a47ebab7f2a605e29b68f2121c1bde7d7">XV_HDMIRX1_FRL_STA_SCRM_LOCK_ALLL_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a4fb39fe8225243a7a63b683cde0e772c">XV_HDMIRX1_FRL_STA_SCRM_LOCK_ALLL_SHIFT</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aa1fb32957e468cc337ac7ce5828a0b50">XV_HDMIRX1_FRL_STA_SKEW_LOCK_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#afdfa16dd3c11af7a70bf3743f3c5dbd3">XV_HDMIRX1_FRL_STA_STR_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#abe2e332e4def7d78b9692fcfe5dceb3a">XV_HDMIRX1_FRL_STA_VID_LOCK_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aa4a2f8e85cba03c8b0eb1a230b2f89c4">XV_HDMIRX1_FRL_STA_WA_LOCK_ALLL_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a55c84609819cd4f182160813cff62ffe">XV_HDMIRX1_FRL_STA_WA_LOCK_ALLL_SHIFT</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a49b8c41fcbbd455844d641a215d6eae8">XV_HDMIRX1_FRL_VID_LOCK_CNT_OFFSET</a>, <a class="el" href="xv__hdmirx1_8h.html#abcaa2a7e3e0a31a5d19b99179e70c636">XV_HdmiRx1_GetFrlActivePixRatio()</a>, <a class="el" href="xv__hdmirx1_8h.html#afd29a2caefd6060c3546e3debe17f03b">XV_HdmiRx1_GetFrlTotalPixRatio()</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ae1aaa652d8211c7cc612dd506aeb480d">XV_HDMIRX1_LNKSTA_STA_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#af4dcda505ba0f225b5b8c9cb9a3c1389">XV_HDMIRX1_PIO_IN_ALIGNER_LOCK_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a9e9029db2aff750b7c208c8eca7faff9">XV_HDMIRX1_PIO_IN_MODE_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a49992379740fbcb1480c2ea6aa8709c2">XV_HDMIRX1_PIO_IN_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a7d01e744c692ff9a143309dd407196a9">XV_HDMIRX1_PIO_IN_SCRAMBLER_LOCKALLL_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#afbf01122ade2aaaf05f758fb22095341">XV_HDMIRX1_PIO_IN_SCRAMBLER_LOCKALLL_SHIFT</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#af3377eb2df940c5697d67f58e08cd20f">XV_HDMIRX1_PKT_ECC_ERR_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a601ed84adad6a742a16572b1394049f7">XV_HDMIRX1_SR_SSB_ERR1_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ace563a6b75eaca93062466c5fb31d3c8">XV_HDMIRX1_SR_SSB_ERR2_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a505ad0065028146badda00bb46ef8100">XV_HDMIRX1_SR_SSB_ERR2_SHIFT</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#adfbfa70ecfc15e9951eed4a41333b8e1">XV_HDMIRX1_SR_SSB_ERR_CNT0_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ae366ca39c9b39631eedf90c9df008502">XV_HDMIRX1_SR_SSB_ERR_CNT1_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a38593421477cf0920a8c26ca2cc02844">XV_HDMIRX1_SR_SSB_ERR_CNT2_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a280f061931e044ccdc8aa667114f17e5">XV_HDMIRX1_SR_SSB_ERR_CNT3_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a161cbe93ae2eadf4572c49ddac875dd9">XV_HDMIRX1_TRIB_ANLZ_LN_ACT_ACT_SZ_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a117109a90e42e3017e55fbfc7ebd9966">XV_HDMIRX1_TRIB_ANLZ_LN_ACT_LN_SZ_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aae138c58ab74045375d385644647ebf5">XV_HDMIRX1_TRIB_ANLZ_LN_ACT_LN_SZ_SHIFT</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#af450e13abf1a60b31de267c985fffbaa">XV_HDMIRX1_TRIB_ANLZ_LN_ACT_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a5bbac44be7ff425765198c35f15ee990">XV_HDMIRX1_TRIB_ANLZ_TIM_CHGD_CNT_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a25030374b218ae27a165342023eb26f6">XV_HDMIRX1_TRIB_ANLZ_TIM_HS_POL_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ad74412e1cce4c05dc20962e823caaa2e">XV_HDMIRX1_TRIB_ANLZ_TIM_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aefd7163342d38fe7440ac8cb178bb734">XV_HDMIRX1_TRIB_ANLZ_TIM_VS_POL_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a1cef14123da432543b502426ea4ba921">XV_HDMIRX1_TRIB_HBP_HS_HBP_SZ_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ac1ff018afd4c825fae5d24a0d99397c8">XV_HDMIRX1_TRIB_HBP_HS_HBP_SZ_SHIFT</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a290b6094a24ee78187d80ce9e3bac2bf">XV_HDMIRX1_TRIB_HBP_HS_HS_SZ_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a8ecc8705595c3f5ef2efdefea908ef19">XV_HDMIRX1_TRIB_HBP_HS_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a7c9d08be5e87e6fd62df99abfd8d3a07">XV_HDMIRX1_VCKE_SYS_CNT_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a98c2ec7a077e707ff67302d576ba468f">XV_HDMIRX1_VER_ID_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a8b63858c4f1f73528819cac7258bc730">XV_HDMIRX1_VER_VERSION_OFFSET</a>.</p>

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          <td class="memname">u32 XV_HdmiRx1_Divide </td>
          <td>(</td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Dividend</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Divisor</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function calculates the divider for the frame calculation. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Dividend</td><td>is the dividend value to use in the calculation. </td></tr>
    <tr><td class="paramname">Divisor</td><td>is the divisor value to use in the calculation.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The result of the calculation.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

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          <td class="memname">void XV_HdmiRx1_DynHDR_GetInfo </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1___dyn_h_d_r___info.html">XV_HdmiRx1_DynHDR_Info</a> *&#160;</td>
          <td class="paramname"><em>RxDynHdrInfoPtr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function gets the Dynamic HDR packet type, length, whether graphics overlay and errors if any. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the XHdmiRx1 core instance. </td></tr>
    <tr><td class="paramname">RxDynHdrInfoPtr</td><td>is a pointer to XHdmiRx1 Dynamic HDR info instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="struct_x_v___hdmi_rx1___config.html#a429bd4e2abdedeb2f459e2bc9cd7723c">XV_HdmiRx1_Config::DynamicHDR</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a3ad16e42fdc47d009ff567cbf65d7ca0">XV_HDMIRX1_AUX_DYN_HDR_INFO_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#add06acac6296880fa714d3265160890d">XV_HDMIRX1_AUX_DYN_HDR_STS_ERR_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a52d316fb63d45bfdcd8def3b5503ef03">XV_HDMIRX1_AUX_DYN_HDR_STS_GOF_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#abd7ef1376fabe26cb32ece3c4efa7450">XV_HDMIRX1_AUX_DYN_HDR_STS_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>.</p>

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          <td class="memname">void XV_HdmiRx1_DynHDR_SetAddr </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u64&#160;</td>
          <td class="paramname"><em>Addr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function sets the Dynamic HDR buffer address. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the XHdmiRx1 core instance. </td></tr>
    <tr><td class="paramname">Addr</td><td>is an address in 64bit format.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="struct_x_v___hdmi_rx1___config.html#a429bd4e2abdedeb2f459e2bc9cd7723c">XV_HdmiRx1_Config::DynamicHDR</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ab0a5740fe6d10b7c283a683e745518cf">XV_HDMIRX1_AUX_DYN_HDR_MEMADDR_LSB_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a94fec423e8bda97ee8cf9a7939e55aa5">XV_HDMIRX1_AUX_DYN_HDR_MEMADDR_MSB_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a949523423dffb540041a98a38e283cf8">XV_HdmiRx1_WriteReg</a>.</p>

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          <td class="memname">void XV_HdmiRx1_EXT_SYSRST </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Reset</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function asserts or releases the HDMI RX External SYSRST. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance. </td></tr>
    <tr><td class="paramname">Reset</td><td>specifies TRUE/FALSE value to either assert or release HDMI RX External SYSRST.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>The reset output of the PIO is inverted. When the system is in reset, the PIO output is cleared and this will reset the HDMI RX. Therefore, clearing the PIO reset output will assert the HDMI External system reset. C-style signature: void <a class="el" href="xv__hdmirx1_8h.html#af441b03cc79286c209dbffed19fc6052" title="This function asserts or releases the HDMI RX External SYSRST. ">XV_HdmiRx1_EXT_SYSRST(XV_HdmiRx1 *InstancePtr, u8 Reset)</a> </dd></dl>

<p>References <a class="el" href="xv__hdmirx1__hw_8h.html#a9f3ee5ffefea5fea81b6278347ac0911">XV_HDMIRX1_PIO_OUT_CLR_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#af4e73625cd9540a0f4885dd41afd95eb">XV_HDMIRX1_PIO_OUT_EXT_SYSRST_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ada35683dde8266cadc45f975707d577b">XV_HDMIRX1_PIO_OUT_SET_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a949523423dffb540041a98a38e283cf8">XV_HdmiRx1_WriteReg</a>.</p>

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          <td class="memname">void XV_HdmiRx1_EXT_VRST </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Reset</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function asserts or releases the HDMI RX External VRST. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance. </td></tr>
    <tr><td class="paramname">Reset</td><td>specifies TRUE/FALSE value to either assert or release HDMI RX External VRST.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>The reset output of the PIO is inverted. When the system is in reset, the PIO output is cleared and this will reset the HDMI RX. Therefore, clearing the PIO reset output will assert the HDMI external video reset. C-style signature: void <a class="el" href="xv__hdmirx1_8h.html#aba149130be3e337c3789bd0fcf3c8481" title="This function asserts or releases the HDMI RX External VRST. ">XV_HdmiRx1_EXT_VRST(XV_HdmiRx1 *InstancePtr, u8 Reset)</a> </dd></dl>

<p>References <a class="el" href="xv__hdmirx1__hw_8h.html#a9f3ee5ffefea5fea81b6278347ac0911">XV_HDMIRX1_PIO_OUT_CLR_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a67959c83fa1faaaccb685a9070cec447">XV_HDMIRX1_PIO_OUT_EXT_VRST_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ada35683dde8266cadc45f975707d577b">XV_HDMIRX1_PIO_OUT_SET_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a949523423dffb540041a98a38e283cf8">XV_HdmiRx1_WriteReg</a>.</p>

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          <td class="memname">u32 XV_HdmiRx1_GetAcrCts </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
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<p>This function provides audio clock regenerating CTS (Cycle-Time Stamp) value at the HDMI sink device. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Audio clock CTS value.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a29e933929edb889a5cf22e2b358bcbd6">XV_HDMIRX1_AUD_CTS_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>.</p>

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          <td class="memname">u32 XV_HdmiRx1_GetAcrN </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
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<p>This function provides audio clock regenerating factor N value. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>ACR N value.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aa108342fb6a7cb47e297368082ba4943">XV_HDMIRX1_AUD_N_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>.</p>

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          <td class="memname">XVidC_ColorFormat XV_HdmiRx1_GetAviColorSpace </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
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<p>This function returns the AVI colorspace (captured by the AUX peripheral) </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The AVI colorspace value.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ae4df89df74ea61966284a00390fc2754">XV_HDMIRX1_AUX_STA_AVI_CS_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ade847b0f35ba1afad9843e799adb7bbe">XV_HDMIRX1_AUX_STA_AVI_CS_SHIFT</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a1ff1aa131b92f22cdadf41f72b41de10">XV_HDMIRX1_AUX_STA_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmirx1_8h.html#a77f3a5723008c8604137960daa6174bd">XV_HdmiRx1_GetVideoProperties()</a>.</p>

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          <td class="memname">u8 XV_HdmiRx1_GetAviVic </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
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<p>This function returns the AVI VIC (captured by the AUX peripheral) </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The AVI VIC code.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a7ab9bb403ffe88b36b5ad9f8dc1b28aa">XV_HDMIRX1_AUX_STA_AVI_VIC_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#abffc2c8a5b1e99d2698108754af68ee2">XV_HDMIRX1_AUX_STA_AVI_VIC_SHIFT</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a1ff1aa131b92f22cdadf41f72b41de10">XV_HDMIRX1_AUX_STA_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmirx1_8h.html#a77f3a5723008c8604137960daa6174bd">XV_HdmiRx1_GetVideoProperties()</a>.</p>

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          <td class="memname">XVidC_ColorDepth XV_HdmiRx1_GetGcpColorDepth </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
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<p>This function returns the GCP color depth (captured by the AUX peripheral) </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The GCP color depth.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a42156911fe2a4d3c5ac885ab25f63008">XV_HDMIRX1_AUX_STA_GCP_CD_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aa32fc692224b983ed8c19d6667bcb3d8">XV_HDMIRX1_AUX_STA_GCP_CD_SHIFT</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a1ff1aa131b92f22cdadf41f72b41de10">XV_HDMIRX1_AUX_STA_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmirx1_8h.html#a77f3a5723008c8604137960daa6174bd">XV_HdmiRx1_GetVideoProperties()</a>.</p>

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          <td class="memname">u32 XV_HdmiRx1_GetLinkStatus </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Type</em>&#160;</td>
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          <td></td>
          <td>)</td>
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<p>This function provides status of the HDMI RX core Link Status peripheral. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance. </td></tr>
    <tr><td class="paramname">Type</td><td>specifies one of the type for which status to be provided:<ul>
<li>0 = Link error counter for channel 0.</li>
<li>1 = Link error counter for channel 1.</li>
<li>2 = Link error counter for channel 2.</li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Link status of the HDMI RX core link.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a87138c8927cdc27db845edb3556a82c8">XV_HDMIRX1_LNKSTA_LNK_ERR0_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>.</p>

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          <td class="memname">int XV_HdmiRx1_GetTmdsClockRatio </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
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<p>This function gets the SCDC TMDS clock ratio bit. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>TRUE = TMDS clock ratio bit is set.</li>
<li>FALSE = TMDS clock ratio bit is cleared.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a49992379740fbcb1480c2ea6aa8709c2">XV_HDMIRX1_PIO_IN_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a51d2852cd78f9a896e224454b97f092b">XV_HDMIRX1_PIO_IN_SCDC_TMDS_CLOCK_RATIO_MASK</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>.</p>

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          <td class="memname">int XV_HdmiRx1_GetVideoProperties </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
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<p>This function reads the video properties from the aux peripheral. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#adf8543d358aeaf359d915412003845e3">XV_HdmiRx1::Stream</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a22196adeeb4add191c26302017bfb8da">XV_HDMIRX1_AUX_STA_AVI_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a1ff1aa131b92f22cdadf41f72b41de10">XV_HDMIRX1_AUX_STA_OFFSET</a>, <a class="el" href="xv__hdmirx1_8c.html#ad4f280e6064c750dcc09cdd3bdcaa408">XV_HdmiRx1_GetAviColorSpace()</a>, <a class="el" href="xv__hdmirx1_8c.html#ab77058d12d39a6cae1920402ad231de8">XV_HdmiRx1_GetAviVic()</a>, <a class="el" href="xv__hdmirx1_8c.html#a4c6e4ca31c0b284eaa58924dd42d1d13">XV_HdmiRx1_GetGcpColorDepth()</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>.</p>

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          <td class="memname">int XV_HdmiRx1_GetVideoTiming </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
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<p>This function reads the video timing from the VTD peripheral. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#adf8543d358aeaf359d915412003845e3">XV_HdmiRx1::Stream</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#a815bc83c2185567b85fc6e6261af9d8c">XV_HdmiRx1::VrrIF</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ae6e5fdc512cb7dc4f87aa5ddf8d87044">XV_HDMIRX1_VTD_ACT_LIN_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aaf231b8bf27d043648c5d4c18570e109">XV_HDMIRX1_VTD_ACT_PIX_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a29d81fca1318aa8e6dcb266ebf3eaf49">XV_HDMIRX1_VTD_HBP_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#aefb8dcc326ae1f421f1755d7eae42f2c">XV_HDMIRX1_VTD_HFP_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ad49d4b9701fc528d4b35be9e0e0784b6">XV_HDMIRX1_VTD_HSW_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a1d7f91b7dd9418376b0f3b3ad33dffa9">XV_HDMIRX1_VTD_STA_FMT_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ac65a4d1a61da0cc29958b992c6096bc7">XV_HDMIRX1_VTD_STA_HS_POL_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a7520909f353bdbc6da5cf59e436c0346">XV_HDMIRX1_VTD_STA_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a8451cdcae193a13f05a07d2b1d7c46f5">XV_HDMIRX1_VTD_STA_VS_POL_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a1130ed99163f49891fe76e84a2fd1ee0">XV_HDMIRX1_VTD_TOT_LIN_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a31173bdc12d5d7c393e0ec4169a0e9bc">XV_HDMIRX1_VTD_TOT_PIX_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a655cb29d88325aab2476894e18a858fe">XV_HDMIRX1_VTD_VBP_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a8b283a7d946febcf50815dc8ad31bf8d">XV_HDMIRX1_VTD_VFP_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a881c6ffd3db18a7af39fe337d00eb179">XV_HDMIRX1_VTD_VSW_OFFSET</a>.</p>

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          <td class="memname">XV_HdmiC_VrrInfoframeType XV_HdmiRx1_GetVrrIfType </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function returns VRR infoframe type. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the XHdmiRx1 core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>XV_HdmiRx1_VrrInfoframeType</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1.html#a815bc83c2185567b85fc6e6261af9d8c">XV_HdmiRx1::VrrIF</a>.</p>

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          <td class="memname">void XV_HdmiRx1_Info </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function prints stream and timing information on STDIO/UART console. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1.html#adf8543d358aeaf359d915412003845e3">XV_HdmiRx1::Stream</a>.</p>

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          <td class="memname">void XV_HdmiRx1_INT_LRST </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Reset</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function asserts or releases the HDMI RX Internal LRST. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance. </td></tr>
    <tr><td class="paramname">Reset</td><td>specifies TRUE/FALSE value to either assert or release HDMI RX Internal LRST.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>The reset output of the PIO is inverted. When the system is in reset, the PIO output is cleared and this will reset the HDMI RX. Therefore, clearing the PIO reset output will assert the HDMI Internal link reset. C-style signature: void <a class="el" href="xv__hdmirx1_8h.html#a54c8f8e466187861aeeb7f1de53839c4" title="This function asserts or releases the HDMI RX Internal VRST. ">XV_HdmiRx1_INT_VRST(XV_HdmiRx1 *InstancePtr, u8 Reset)</a> </dd></dl>

<p>References <a class="el" href="xv__hdmirx1__hw_8h.html#a9f3ee5ffefea5fea81b6278347ac0911">XV_HDMIRX1_PIO_OUT_CLR_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a40d80538fcb5bc6ae4dd18590766b12c">XV_HDMIRX1_PIO_OUT_INT_LRST_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ada35683dde8266cadc45f975707d577b">XV_HDMIRX1_PIO_OUT_SET_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a949523423dffb540041a98a38e283cf8">XV_HdmiRx1_WriteReg</a>.</p>

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          <td class="memname">void XV_HdmiRx1_INT_VRST </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Reset</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function asserts or releases the HDMI RX Internal VRST. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance. </td></tr>
    <tr><td class="paramname">Reset</td><td>specifies TRUE/FALSE value to either assert or release HDMI RX Internal VRST.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>The reset output of the PIO is inverted. When the system is in reset, the PIO output is cleared and this will reset the HDMI RX. Therefore, clearing the PIO reset output will assert the HDMI Internal video reset. C-style signature: void <a class="el" href="xv__hdmirx1_8h.html#a54c8f8e466187861aeeb7f1de53839c4" title="This function asserts or releases the HDMI RX Internal VRST. ">XV_HdmiRx1_INT_VRST(XV_HdmiRx1 *InstancePtr, u8 Reset)</a> </dd></dl>

<p>References <a class="el" href="xv__hdmirx1__hw_8h.html#a9f3ee5ffefea5fea81b6278347ac0911">XV_HDMIRX1_PIO_OUT_CLR_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a12d07ceb2b0cf661463eace18d19b370">XV_HDMIRX1_PIO_OUT_INT_VRST_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ada35683dde8266cadc45f975707d577b">XV_HDMIRX1_PIO_OUT_SET_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a949523423dffb540041a98a38e283cf8">XV_HdmiRx1_WriteReg</a>.</p>

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          <td class="memname">int XV_HdmiRx1_IsLinkStatusErrMax </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function provides status of one of the link error counters reached the maximum value. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>TRUE = Maximum error counter reached.</li>
<li>FALSE = Maximum error counter not reached.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ac8d20de61b9c7d747c78d766aeaec51c">XV_HDMIRX1_LNKSTA_STA_ERR_MAX_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ae1aaa652d8211c7cc612dd506aeb480d">XV_HDMIRX1_LNKSTA_STA_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>.</p>

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          <td class="memname">int XV_HdmiRx1_IsStreamConnected </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function provides the stream connected status. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>TRUE = Stream is connected.</li>
<li>FALSE = Stream is connected.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1.html#adf8543d358aeaf359d915412003845e3">XV_HdmiRx1::Stream</a>.</p>

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          <td class="memname">int XV_HdmiRx1_IsStreamScrambled </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function provides the stream scrambler status. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>TRUE = Stream is scrambled.</li>
<li>FALSE = Stream is not scrambled.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1.html#adf8543d358aeaf359d915412003845e3">XV_HdmiRx1::Stream</a>.</p>

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          <td class="memname">int XV_HdmiRx1_IsStreamUp </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function provides status of the stream. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>TRUE = Stream is up.</li>
<li>FALSE = Stream is down.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1.html#adf8543d358aeaf359d915412003845e3">XV_HdmiRx1::Stream</a>, and <a class="el" href="xv__hdmirx1_8h.html#aaff80d21f94c4b494ab6beb909f74ebaa78cc6e34272e81a858d62f92557a3950">XV_HDMIRX1_STATE_STREAM_UP</a>.</p>

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          <td class="memname">XVidC_VideoMode XV_HdmiRx1_LookupVmId </td>
          <td>(</td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>Vic</em></td><td>)</td>
          <td></td>
        </tr>
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<p>This function searches for the video mode based on the vic. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Vic</td><td></td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>Vic defined in the VIC table.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

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          <td class="memname">void XV_HdmiRx1_RegisterDebug </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function prints out HDMI RX register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a49b8c41fcbbd455844d641a215d6eae8">XV_HDMIRX1_FRL_VID_LOCK_CNT_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a851cb0524c797d3ce8380b1c27b9a17f">XV_HdmiRx1_ReadReg</a>.</p>

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          <td class="memname">void XV_HdmiRx1_SetAxiClkFreq </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>ClkFreq</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function sets the AXI4-Lite Clock Frequency. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance. </td></tr>
    <tr><td class="paramname">ClkFreq</td><td>specifies the value that needs to be set.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd></dd></dl>
<dl class="section note"><dt>Note</dt><dd>This is required after a reset or init. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>.</p>

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          <td class="memname">void XV_HdmiRx1_SetColorFormat </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
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<p>This function sets the color format. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#adf8543d358aeaf359d915412003845e3">XV_HdmiRx1::Stream</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a686038ae877f6ad613ca1eb8d6e20596">XV_HDMIRX1_PIO_OUT_COLOR_SPACE_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ab91524f2e3868ea812c5e9a6e6a877ec">XV_HDMIRX1_PIO_OUT_COLOR_SPACE_SHIFT</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#acdedab9c5aa955316fd71fcf8597ba83">XV_HDMIRX1_PIO_OUT_MSK_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a2762aba9d45253971668c25e35400e3f">XV_HDMIRX1_PIO_OUT_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a949523423dffb540041a98a38e283cf8">XV_HdmiRx1_WriteReg</a>.</p>

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          <td class="memname">int XV_HdmiRx1_SetHpd </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>SetClr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function enables/clear Hot-Plug-Detect. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance. </td></tr>
    <tr><td class="paramname">SetClr</td><td>specifies TRUE/FALSE value to either enable or clear HPD respectively.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS is always returned.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1_8h.html#a04b941fdfc281d7d81665d47ac32f1d2">XV_HdmiRx1_FrlReset()</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a9f3ee5ffefea5fea81b6278347ac0911">XV_HDMIRX1_PIO_OUT_CLR_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ad0879431e9c01049409338523d61c179">XV_HDMIRX1_PIO_OUT_HPD_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#ada35683dde8266cadc45f975707d577b">XV_HDMIRX1_PIO_OUT_SET_OFFSET</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a949523423dffb540041a98a38e283cf8">XV_HdmiRx1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmirx1_8h.html#ae8f2b92316ba8599c678aa9168d2eb24">XV_HdmiRx1_CfgInitialize()</a>.</p>

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          <td class="memname">void XV_HdmiRx1_SetPixelClk </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function sets the PixelClk based on the current ColorDepth, RefClk and ColorFormatId. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1.html#adf8543d358aeaf359d915412003845e3">XV_HdmiRx1::Stream</a>.</p>

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          <td class="memname">int XV_HdmiRx1_SetPixelRate </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function sets the pixel rate. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS is always returned.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1___config.html#ab0d9f429af93cfc3bf3a97e5fc63692c">XV_HdmiRx1_Config::BaseAddress</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="struct_x_v___hdmi_rx1.html#adf8543d358aeaf359d915412003845e3">XV_HdmiRx1::Stream</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#acdedab9c5aa955316fd71fcf8597ba83">XV_HDMIRX1_PIO_OUT_MSK_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a2762aba9d45253971668c25e35400e3f">XV_HDMIRX1_PIO_OUT_OFFSET</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a478987cdc818e2083db0f500ef6b66ab">XV_HDMIRX1_PIO_OUT_PIXEL_RATE_MASK</a>, <a class="el" href="xv__hdmirx1__hw_8h.html#a3177edd91ed0cd44227a908abcd854ca">XV_HDMIRX1_PIO_OUT_PIXEL_RATE_SHIFT</a>, and <a class="el" href="xv__hdmirx1__hw_8h.html#a949523423dffb540041a98a38e283cf8">XV_HdmiRx1_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmirx1_8h.html#adca7f7b2b7849037460f1d95faa9ac7a">XV_HdmiRx1_SetStream()</a>.</p>

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          <td class="memname">int XV_HdmiRx1_SetStream </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XVidC_PixelsPerClock&#160;</td>
          <td class="paramname"><em>Ppc</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Clock</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>This function sets the HDMI RX stream parameters. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance. </td></tr>
    <tr><td class="paramname">Ppc</td><td>specifies the pixel per clock.<ul>
<li>4 = XVIDC_PPC_4 </li>
</ul>
</td></tr>
    <tr><td class="paramname">Clock</td><td>specifies reference pixel clock frequency.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS is always returned.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1.html#adf8543d358aeaf359d915412003845e3">XV_HdmiRx1::Stream</a>, and <a class="el" href="xv__hdmirx1_8c.html#a8a1adaddc73691394f2f181411fffdc7">XV_HdmiRx1_SetPixelRate()</a>.</p>

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          <td class="memname">void XV_HdmiRx1_SetVrrIfType </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XV_HdmiC_VrrInfoframeType&#160;</td>
          <td class="paramname"><em>Type</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function Sets VRR infoframe type. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the XHdmiRx1 core instance. </td></tr>
    <tr><td class="paramname">Type</td><td>of type XV_HdmiRx1_VrrInfoframeType</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1.html#a815bc83c2185567b85fc6e6261af9d8c">XV_HdmiRx1::VrrIF</a>.</p>

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          <td class="memname">void XV_HdmiRx1_Start </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function starts the HDMI RX core. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This is required after a reset or initialization. </dd></dl>

<p>References <a class="el" href="xv__hdmirx1_8h.html#ab1af2cce1f2ff3ae52dfb4cfbcd9a436">XV_HdmiRx1_PioEnable</a>, and <a class="el" href="xv__hdmirx1_8h.html#a5ec3cb1a32c4e030d365023832bba3e2">XV_HdmiRx1_PioIntrEnable</a>.</p>

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          <td class="memname">void XV_HdmiRx1_Stop </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>This function stops the HDMI RX core. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="xv__hdmirx1_8h.html#a4d57a91b21377a43a2692f64564bc121">XV_HdmiRx1_PioDisable</a>, and <a class="el" href="xv__hdmirx1_8h.html#ae5f391082b5e60a7ea25086124900070">XV_HdmiRx1_PioIntrDisable</a>.</p>

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          <td class="memname">void XV_HdmiRx1_TmrStartMs </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Milliseconds</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>TimerSelect</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
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<p>This function sets the timer of RX Core. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the XHdmi_Rx core instance.</td></tr>
    <tr><td class="paramname">Milliseconds</td><td>specifies the timer's frequency (in milliseconds)</td></tr>
    <tr><td class="paramname">TimerSelect</td><td>selects which of the timer unit to be used</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1.html#aa1008eb31826031b552c087c5f8d87d8">XV_HdmiRx1::Config</a>, <a class="el" href="xv__hdmirx1_8h.html#aaa7bbaf2ae1157d275c4963c2f11cd16">XV_HdmiRx1_Tmr1Start</a>, <a class="el" href="xv__hdmirx1_8h.html#ab2b8c0c606b059fe056a78b9a93417b8">XV_HdmiRx1_Tmr2Start</a>, <a class="el" href="xv__hdmirx1_8h.html#a0b54de6bbd95ea2f25998c28db0fef69">XV_HdmiRx1_Tmr3Start</a>, and <a class="el" href="xv__hdmirx1_8h.html#a4de4494c309d24995f84a567459d7b31">XV_HdmiRx1_Tmr4Start</a>.</p>

<p>Referenced by <a class="el" href="xv__hdmirx1__frl_8c.html#adebf854f66fb92c37366faab549dd4a8">XV_HdmiRx1_PhyResetPoll()</a>.</p>

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          <td class="memname">void XV_HdmiRx1_UpdateEdFlags </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_v___hdmi_rx1.html">XV_HdmiRx1</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
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<p>This function checks if RX's CED or RSED counters are incrementing at the rate of 4 or higher per second or if they first hit the maximum value (0x7FFF) then set the CED_Update or RSED_Update SCDC flags if true. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_v___hdmi_rx1.html" title="The XHdmiRx1 driver instance data. ">XV_HdmiRx1</a> core instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This function needs to be called every 1 second to comply with the spec on CED_Update and RSED_Update flags updating. </dd></dl>

<p>References <a class="el" href="struct_x_v___hdmi_rx1.html#adf8543d358aeaf359d915412003845e3">XV_HdmiRx1::Stream</a>, <a class="el" href="xv__hdmirx1_8h.html#a38c0efa82d512c42b07775e36f919bb2">XV_HdmiRx1_FrlDdcReadField()</a>, and <a class="el" href="xv__hdmirx1_8h.html#ab17e4f96ebbe6785b411233165de859a">XV_HdmiRx1_FrlDdcWriteField()</a>.</p>

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